1. Field of the Invention
The present invention relates to a capacitive-load driving circuit and a plasma display apparatus using the same, and more particularly, to a circuit technique capable of properly handling the temperature rise occurring due to the driving of capacitive loads in a plasma display panel, an electronic luminescence panel, and the like.
2. Description of the Related Art
Recently, a variety of display apparatuses have been researched and developed, and the research and development of thin flat display apparatuses, exemplified by plasma display panels (PDP) and electronic luminescence (EL) panels, has been proceeding. Among them, the PDP, with its ability to achieve a large-screen, fast-response display and its improved display quality, has been attracting attention as a display apparatus that has the potential of replacing the traditional CRT.
The PDPs are largely classified as AC or DC. The DC PDPs have the characteristic that the matrix discharge electrodes are exposed in each discharge cell and the electric field control of the discharge space in the cell is easy. On the other hand, the AC PDPs have the characteristic that the matrix discharge electrodes are covered with a dielectric layer, which reduces electrode degradation due to discharge and achieves a longer life. Further, a three-electrode panel construction (three-electrode surface-discharge AC-type PDP), in which a front plate with X electrodes and Y electrodes formed thereon in the horizontal line direction and a back panel with address electrodes in the vertical column direction are simply laminated together one on top of the other, has been commercially implemented, facilitating the construction of a higher-resolution display.
Incidentally, in a prior art technique for achieving power reduction in a pulsed capacitive-load driving circuit, it is known to provide a power recovery circuit that utilizes a phenomenon of resonance for energy transfer between load capacitance and inductance. One specific example of the power recovery technique suitable for a driving circuit where the load capacitance varies greatly for driving each individual load electrode by a mutually independent voltage in accordance with display image, as in an address electrode driving circuit, is the low power driving circuit disclosed in Japanese Unexamined Patent Publication (Kokai) No. 05-249916.
The prior art capacitive-load driving circuit recovers power by utilizing a phenomenon of resonance, but with the recent trend toward higher-resolution and larger-screen plasma display panels, the power consumption reduction design has been losing its effectiveness significantly. Specifically, when the output frequency of the driving circuit is increased to increase the resolution of the panel, it becomes necessary to reduce the resonance time in order to maintain the control performance of the panel. If the power consumption of the driving circuit cannot be reduced sufficiently, the cost involved in removing heat from various parts of the display, and therefore, the component cost, increases, and besides, this could lead to a situation where the display brightness is reduced due to the limit of the heat dissipation capability of the display apparatus itself, or where the advantage of the flat panel display, i.e., thin and light-weight construction, cannot be exploited to the full.
Furthermore, as the output frequency of the driving circuit increases, power consumption increases due to the generation of high-voltage pulses to drive the plasma display panel, and a temperature rise in the driving circuit (drive IC) becomes a serious concern.
The prior art and the problems associated with the prior art will be described in detail later with reference to accompanying drawings.